commit 9f058db2a3433ab5545046ec1f0c2aec80f030dd Author: m.heisig Date: Thu Jan 15 10:59:44 2026 +0100 Initial commit diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..1fb1b54 --- /dev/null +++ b/.gitignore @@ -0,0 +1,57 @@ +### TwinCAT3 ### +# website: https://www.beckhoff.com/twincat3/ + +# TwinCAT PLC +*.plcproj.bak +*.plcproj.orig +*.tpy +*.tclrs +*.library +*.compiled-library +*.compileinfo +*.asm +*.core +LineIDs.dbg +LineIDs.dbg.bak + +# TwinCAT C++ and shared types +# ignoring the TMC file is only useful for plain PLC programming +# as soon as shared data types (via tmc), C++ or in general TcCom-Module are used, the TMC file has to be part of the repository +*.tmc +*.tmcRefac + +# TwinCAT project files +*.tsproj.bak +*.tspproj.bak +*.tsproj.b?k +*.tsproj.orig +*.xti.bak +*.xti.bk? +*.xti.orig +*.xtv +*.xtv.bak +*.xtv.bk? +*.tnzip + +# Multiuser specific +**/.TcGit/ + +# exclude not required folders +**/_Boot/ +**/_CompileInfo/ +**/_Libraries/ +**/_ModuleInstall/ +**/_Deployment/ +**/_Repository/ + +# VS Shell project specific files and folders +**/.vs/ +*.~u +*.project.~u +*.suo + +# Own Ignores +commit.txt +*.txt +*.exe +*.xlsx \ No newline at end of file diff --git a/Infineon.sln b/Infineon.sln new file mode 100644 index 0000000..d4e2c91 --- /dev/null +++ b/Infineon.sln @@ -0,0 +1,117 @@ + +Microsoft Visual Studio Solution File, Format Version 12.00 +# TcXaeShell Solution File, Format Version 11.00 +VisualStudioVersion = 17.10.35827.194 +MinimumVisualStudioVersion = 10.0.40219.1 +Project("{B1E792BE-AA5F-4E3C-8C82-674BF9C0715B}") = "Infineon", "Infineon.tsproj", "{CB97A0B0-7E22-470D-8550-AA318EA46E50}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|TwinCAT OS (ARMV7-A) = Debug|TwinCAT OS (ARMV7-A) + Debug|TwinCAT OS (ARMV7-M) = Debug|TwinCAT OS (ARMV7-M) + Debug|TwinCAT OS (ARMV8-A) = Debug|TwinCAT OS (ARMV8-A) + Debug|TwinCAT OS (x64) = Debug|TwinCAT OS (x64) + Debug|TwinCAT OS (x64-E) = Debug|TwinCAT OS (x64-E) + Debug|TwinCAT RT (x64) = Debug|TwinCAT RT (x64) + Debug|TwinCAT RT (x86) = Debug|TwinCAT RT (x86) + Release|TwinCAT OS (ARMV7-A) = Release|TwinCAT OS (ARMV7-A) + Release|TwinCAT OS (ARMV7-M) = Release|TwinCAT OS (ARMV7-M) + Release|TwinCAT OS (ARMV8-A) = Release|TwinCAT OS (ARMV8-A) + Release|TwinCAT OS (x64) = Release|TwinCAT OS (x64) + Release|TwinCAT OS (x64-E) = Release|TwinCAT OS (x64-E) + Release|TwinCAT RT (x64) = Release|TwinCAT RT (x64) + Release|TwinCAT RT (x86) = Release|TwinCAT RT (x86) + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT OS (ARMV7-A).ActiveCfg = Debug|TwinCAT OS (ARMV7-A) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT OS (ARMV7-A).Build.0 = Debug|TwinCAT OS (ARMV7-A) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT OS (ARMV7-M).ActiveCfg = Debug|TwinCAT OS (ARMV7-M) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT OS (ARMV7-M).Build.0 = Debug|TwinCAT OS (ARMV7-M) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT OS (ARMV8-A).ActiveCfg = Debug|TwinCAT OS (ARMV8-A) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT OS (ARMV8-A).Build.0 = Debug|TwinCAT OS (ARMV8-A) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT OS (x64).ActiveCfg = Debug|TwinCAT OS (x64) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT OS (x64).Build.0 = Debug|TwinCAT OS (x64) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT OS (x64-E).ActiveCfg = Debug|TwinCAT OS (x64-E) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT OS (x64-E).Build.0 = Debug|TwinCAT OS (x64-E) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT RT (x64).ActiveCfg = Debug|TwinCAT RT (x64) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT RT (x64).Build.0 = Debug|TwinCAT RT (x64) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT RT (x86).ActiveCfg = Debug|TwinCAT RT (x86) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Debug|TwinCAT RT (x86).Build.0 = Debug|TwinCAT RT (x86) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT OS (ARMV7-A).ActiveCfg = Release|TwinCAT OS (ARMV7-A) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT OS (ARMV7-A).Build.0 = Release|TwinCAT OS (ARMV7-A) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT OS (ARMV7-M).ActiveCfg = Release|TwinCAT OS (ARMV7-M) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT OS (ARMV7-M).Build.0 = Release|TwinCAT OS (ARMV7-M) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT OS (ARMV8-A).ActiveCfg = Release|TwinCAT OS (ARMV8-A) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT OS (ARMV8-A).Build.0 = Release|TwinCAT OS (ARMV8-A) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT OS (x64).ActiveCfg = Release|TwinCAT OS (x64) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT OS (x64).Build.0 = Release|TwinCAT OS (x64) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT OS (x64-E).ActiveCfg = Release|TwinCAT OS (x64-E) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT OS (x64-E).Build.0 = Release|TwinCAT OS (x64-E) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT RT (x64).ActiveCfg = Release|TwinCAT RT (x64) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT RT (x64).Build.0 = Release|TwinCAT RT (x64) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT RT (x86).ActiveCfg = Release|TwinCAT RT (x86) + {CB97A0B0-7E22-470D-8550-AA318EA46E50}.Release|TwinCAT RT (x86).Build.0 = Release|TwinCAT RT (x86) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT OS (ARMV7-A).ActiveCfg = Debug|TwinCAT OS (ARMV7-A) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT OS (ARMV7-A).Build.0 = Debug|TwinCAT OS (ARMV7-A) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT OS (ARMV7-M).ActiveCfg = Debug|TwinCAT OS (ARMV7-M) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT OS (ARMV7-M).Build.0 = Debug|TwinCAT OS (ARMV7-M) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT OS (ARMV8-A).ActiveCfg = Debug|TwinCAT OS (ARMV8-A) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT OS (ARMV8-A).Build.0 = Debug|TwinCAT OS (ARMV8-A) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT OS (x64).ActiveCfg = Debug|TwinCAT OS (x64) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT OS (x64).Build.0 = Debug|TwinCAT OS (x64) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT OS (x64-E).ActiveCfg = Debug|TwinCAT OS (x64-E) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT OS (x64-E).Build.0 = Debug|TwinCAT OS (x64-E) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT RT (x64).ActiveCfg = Debug|TwinCAT RT (x64) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT RT (x64).Build.0 = Debug|TwinCAT RT (x64) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT RT (x86).ActiveCfg = Debug|TwinCAT RT (x86) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Debug|TwinCAT RT (x86).Build.0 = Debug|TwinCAT RT (x86) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT OS (ARMV7-A).ActiveCfg = Release|TwinCAT OS (ARMV7-A) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT OS (ARMV7-A).Build.0 = Release|TwinCAT OS (ARMV7-A) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT OS (ARMV7-M).ActiveCfg = Release|TwinCAT OS (ARMV7-M) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT OS (ARMV7-M).Build.0 = Release|TwinCAT OS (ARMV7-M) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT OS (ARMV8-A).ActiveCfg = Release|TwinCAT OS (ARMV8-A) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT OS (ARMV8-A).Build.0 = Release|TwinCAT OS (ARMV8-A) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT OS (x64).ActiveCfg = Release|TwinCAT OS (x64) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT OS (x64).Build.0 = Release|TwinCAT OS (x64) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT OS (x64-E).ActiveCfg = Release|TwinCAT OS (x64-E) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT OS (x64-E).Build.0 = Release|TwinCAT OS (x64-E) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT RT (x64).ActiveCfg = Release|TwinCAT RT (x64) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT RT (x64).Build.0 = Release|TwinCAT RT (x64) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT RT (x86).ActiveCfg = Release|TwinCAT RT (x86) + {16E7B360-DCD5-431E-9380-EF0E96A38071}.Release|TwinCAT RT (x86).Build.0 = Release|TwinCAT RT (x86) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT OS (ARMV7-A).ActiveCfg = Debug|TwinCAT OS (ARMV7-A) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT OS (ARMV7-A).Build.0 = Debug|TwinCAT OS (ARMV7-A) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT OS (ARMV7-M).ActiveCfg = Debug|TwinCAT OS (ARMV7-M) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT OS (ARMV7-M).Build.0 = Debug|TwinCAT OS (ARMV7-M) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT OS (ARMV8-A).ActiveCfg = Debug|TwinCAT OS (ARMV8-A) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT OS (ARMV8-A).Build.0 = Debug|TwinCAT OS (ARMV8-A) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT OS (x64).ActiveCfg = Debug|TwinCAT OS (x64) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT OS (x64).Build.0 = Debug|TwinCAT OS (x64) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT OS (x64-E).ActiveCfg = Debug|TwinCAT OS (x64-E) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT OS (x64-E).Build.0 = Debug|TwinCAT OS (x64-E) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT RT (x64).ActiveCfg = Debug|TwinCAT RT (x64) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT RT (x64).Build.0 = Debug|TwinCAT RT (x64) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT RT (x86).ActiveCfg = Debug|TwinCAT RT (x86) + {384A40E7-3107-4D80-8361-04B00829260A}.Debug|TwinCAT RT (x86).Build.0 = Debug|TwinCAT RT (x86) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT OS (ARMV7-A).ActiveCfg = Release|TwinCAT OS (ARMV7-A) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT OS (ARMV7-A).Build.0 = Release|TwinCAT OS (ARMV7-A) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT OS (ARMV7-M).ActiveCfg = Release|TwinCAT OS (ARMV7-M) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT OS (ARMV7-M).Build.0 = Release|TwinCAT OS (ARMV7-M) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT OS (ARMV8-A).ActiveCfg = Release|TwinCAT OS (ARMV8-A) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT OS (ARMV8-A).Build.0 = Release|TwinCAT OS (ARMV8-A) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT OS (x64).ActiveCfg = Release|TwinCAT OS (x64) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT OS (x64).Build.0 = Release|TwinCAT OS (x64) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT OS (x64-E).ActiveCfg = Release|TwinCAT OS (x64-E) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT OS (x64-E).Build.0 = Release|TwinCAT OS (x64-E) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT RT (x64).ActiveCfg = Release|TwinCAT RT (x64) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT RT (x64).Build.0 = Release|TwinCAT RT (x64) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT RT (x86).ActiveCfg = Release|TwinCAT RT (x86) + {384A40E7-3107-4D80-8361-04B00829260A}.Release|TwinCAT RT (x86).Build.0 = Release|TwinCAT RT (x86) + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection + GlobalSection(ExtensibilityGlobals) = postSolution + SolutionGuid = {26FFAF9C-69E1-4F17-B5D4-3FA395D806CB} + EndGlobalSection +EndGlobal diff --git a/Infineon.tsproj b/Infineon.tsproj new file mode 100644 index 0000000..8fb0d0d --- /dev/null +++ b/Infineon.tsproj @@ -0,0 +1,37 @@ + + + + + + + PlcTask + + + + + + + + + + + + + + ANALYTICS + 437 + Hauptstraße 5, 32567 Berlin123.4143.45553.3.211.0Stream Target 1FILE%TC_BOOTPRJPATH%127.0.0.11883false3000000060000000032768NO_SECURITYfalsefalsefalsefalsefalseHexKeyNonefalse]]> + + + + + + + + + + + + + + diff --git a/PLC/00_Main/PRG_Main.TcPOU b/PLC/00_Main/PRG_Main.TcPOU new file mode 100644 index 0000000..eae5c46 --- /dev/null +++ b/PLC/00_Main/PRG_Main.TcPOU @@ -0,0 +1,12 @@ + + + + + + + + + \ No newline at end of file diff --git a/PLC/00_Main/PRG_Safety.TcPOU b/PLC/00_Main/PRG_Safety.TcPOU new file mode 100644 index 0000000..f16f44d --- /dev/null +++ b/PLC/00_Main/PRG_Safety.TcPOU @@ -0,0 +1,13 @@ + + + + + + + + + \ No newline at end of file diff --git a/PLC/01_Stationen/Kuka_Robot/FB_KukaRobot.TcPOU b/PLC/01_Stationen/Kuka_Robot/FB_KukaRobot.TcPOU new file mode 100644 index 0000000..924a420 --- /dev/null +++ b/PLC/01_Stationen/Kuka_Robot/FB_KukaRobot.TcPOU @@ -0,0 +1,17 @@ + + + + + + + + + \ No newline at end of file diff --git a/PLC/01_Stationen/TrayFeeder/FB_TrayFeeder.TcPOU b/PLC/01_Stationen/TrayFeeder/FB_TrayFeeder.TcPOU new file mode 100644 index 0000000..b5a4e7c --- /dev/null +++ b/PLC/01_Stationen/TrayFeeder/FB_TrayFeeder.TcPOU @@ -0,0 +1,28 @@ + + + + + + + + + \ No newline at end of file diff --git a/PLC/ISA88/E_Isa88_Cmd.TcDUT b/PLC/ISA88/E_Isa88_Cmd.TcDUT new file mode 100644 index 0000000..07fc6aa --- /dev/null +++ b/PLC/ISA88/E_Isa88_Cmd.TcDUT @@ -0,0 +1,21 @@ + + + + + + \ No newline at end of file diff --git a/PLC/ISA88/E_Isa88_State.TcDUT b/PLC/ISA88/E_Isa88_State.TcDUT new file mode 100644 index 0000000..1a95b00 --- /dev/null +++ b/PLC/ISA88/E_Isa88_State.TcDUT @@ -0,0 +1,29 @@ + + + + + + \ No newline at end of file diff --git a/PLC/ISA88/FB_Isa88_SM.TcPOU b/PLC/ISA88/FB_Isa88_SM.TcPOU new file mode 100644 index 0000000..3d51404 --- /dev/null +++ b/PLC/ISA88/FB_Isa88_SM.TcPOU @@ -0,0 +1,129 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/PLC/PLC.plcproj b/PLC/PLC.plcproj new file mode 100644 index 0000000..0c4a215 --- /dev/null +++ b/PLC/PLC.plcproj @@ -0,0 +1,152 @@ + + + + 1.0.0.0 + 2.0 + {384a40e7-3107-4d80-8361-04b00829260a} + true + true + false + false + PLC + 3.1.4026.19 + true + {504e694b-aca9-4a4a-af71-0bcb7e8cc6f1} + {ca7afa57-b1d9-4c28-bd68-15ebf02c76f4} + {30b20ca2-00ad-4a5f-afa6-6c27994f4219} + {ddbceeba-d0c8-495b-9a5c-2661c67a1e92} + {75f900e4-4087-4191-b701-8d2490967e28} + {c257ae08-f675-4e0f-94b6-8cb38c7cb40e} + + + + Code + + + Code + + + Code + + + Code + + + Code + + + Code + + + Code + + + Code + + + + + + + + + + + + Tc2_Standard, * (Beckhoff Automation GmbH) + Tc2_Standard + + + Tc2_System, * (Beckhoff Automation GmbH) + Tc2_System + + + Tc3_Module, * (Beckhoff Automation GmbH) + Tc3_Module + true + + + + + Content + + + + + + + + "<ProjectRoot>" + + {192FAD59-8248-4824-A8DE-9177C94C195A} + + "{192FAD59-8248-4824-A8DE-9177C94C195A}" + + + + {29BD8D0C-3586-4548-BB48-497B9A01693F} + + "{29BD8D0C-3586-4548-BB48-497B9A01693F}" + + NamingConventions + + "NamingConventions" + + + + Rules + + "Rules" + + + + + + + {40450F57-0AA3-4216-96F3-5444ECB29763} + + "{40450F57-0AA3-4216-96F3-5444ECB29763}" + + + + {8A0FB252-96EB-4DCC-A5B4-B4804D05E2D6} + + "{8A0FB252-96EB-4DCC-A5B4-B4804D05E2D6}" + + + WriteLineIDs + True + + + {8F99A816-E488-41E4-9FA3-846536012284} + + "{8F99A816-E488-41E4-9FA3-846536012284}" + + + DisabledWarningIds + 410,5410 + + + {F66C7017-BDD8-4114-926C-81D6D687E35F} + + "{F66C7017-BDD8-4114-926C-81D6D687E35F}" + + + CalcActiveTransOnly + True + + + + + + + + System.Boolean + System.Collections.Hashtable + {54dd0eac-a6d8-46f2-8c27-2f43c7e49861} + System.String + + + + + \ No newline at end of file diff --git a/PLC/PlcTask.TcTTO b/PLC/PlcTask.TcTTO new file mode 100644 index 0000000..85ca8d4 --- /dev/null +++ b/PLC/PlcTask.TcTTO @@ -0,0 +1,16 @@ + + + + + 10000 + 20 + + PRG_Main + + {40eb18ee-d47c-458f-bba5-88b899fc1567} + {6e3535be-c313-4e44-9f98-4268a560c4bf} + {a517e31b-a198-4d86-966d-de639188d58a} + {f2d85645-b0a7-4fb0-8bfd-934b805932df} + {0b59712d-3126-4ec1-9176-76eb1e3cdd75} + + \ No newline at end of file diff --git a/TwinSAFE/GVLs/GVL1.sgvl b/TwinSAFE/GVLs/GVL1.sgvl new file mode 100644 index 0000000..956ca97 --- /dev/null +++ b/TwinSAFE/GVLs/GVL1.sgvl @@ -0,0 +1,78 @@ + + + + Com_Err + + + 3270e6d2-bd8a-4e1f-a585-4644cbdc62f6 + + + + + 8 + 1 + 1131179972 + + + + + Other_Err + + + 8492bbfe-6a9a-4ce5-9bdc-21556c1aa15f + + + + + 10 + 1 + 1131179972 + + + + + FB_Err + + + ba7e2641-aff1-4a75-b5bd-1597a7f10587 + + + + + 11 + 1 + 1131179972 + + + + + RunStop + + + 9 + 1 + 1131179973 + + + + + 08fab2e8-8d41-4915-ba0f-0c17dc36ad64 + + + + + ComStartUp + + + be1c8379-9b75-4bf0-a193-40e56e945813 + + + + + 12 + 1 + 1131179972 + + + + \ No newline at end of file diff --git a/TwinSAFE/TargetSystemConfig.xml b/TwinSAFE/TargetSystemConfig.xml new file mode 100644 index 0000000..7f879dd --- /dev/null +++ b/TwinSAFE/TargetSystemConfig.xml @@ -0,0 +1,22 @@ + + + HSafetyPLC + EL1918 + false + 50462729 + PC_K01_KL02 (EL1918) + 02 (V01.08) + 3885647 + 61083 + false + false + 1 + 12 + 12 + 0.0.0.0.2.1 + 1004 + false + false + false + + \ No newline at end of file diff --git a/TwinSAFE/TwinSAFE.splcproj b/TwinSAFE/TwinSAFE.splcproj new file mode 100644 index 0000000..185ce4e --- /dev/null +++ b/TwinSAFE/TwinSAFE.splcproj @@ -0,0 +1,90 @@ + + + + Debug + 2.0 + {16e7b360-dcd5-431e-9380-ef0e96a38071} + Exe + TwinCAT3SafePlcProject + TwinCAT3SafePlcProject + + + 2.0 + EL6900 + Graphical Editor + ODiab + TwinSAFE + false + 1.8.0.0 + 212 + + + false + bin\Release\ + false + AllRules.ruleset + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + TwinSafeGroup1\TwinSafeGroup1.sal + false + + + false + + + + + + + + + + + + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/ActuatorVoltage.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/ActuatorVoltage.sds new file mode 100644 index 0000000..231cdaa --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/ActuatorVoltage.sds @@ -0,0 +1,18 @@ + + + + 1 + 2 + 0 + + 157 + + Manual + + Out + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/ComStartup.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/ComStartup.sds new file mode 100644 index 0000000..52d1fd8 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/ComStartup.sds @@ -0,0 +1,18 @@ + + + + 1 + 2 + 0 + + 12 + + Manual + + Out + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Com_Err.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Com_Err.sds new file mode 100644 index 0000000..3ee926c --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Com_Err.sds @@ -0,0 +1,18 @@ + + + + 1 + 2 + 0 + + 8 + + Manual + + Out + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/ErrorAcknowledgement.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/ErrorAcknowledgement.sds new file mode 100644 index 0000000..3e38784 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/ErrorAcknowledgement.sds @@ -0,0 +1,18 @@ + + + + 1 + 1 + 0 + + 1 + + Manual + + In + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/Etcher1DoorLock.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/Etcher1DoorLock.sds new file mode 100644 index 0000000..5e2afd1 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/Etcher1DoorLock.sds @@ -0,0 +1,18 @@ + + + + 1 + 1 + 0 + + 201 + + Manual + + In + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/Etcher1RobotDoorLock.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/Etcher1RobotDoorLock.sds new file mode 100644 index 0000000..b5e1976 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/Etcher1RobotDoorLock.sds @@ -0,0 +1,18 @@ + + + + 1 + 1 + 0 + + 203 + + Manual + + In + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL02 (EL1918) - Module 1 (FSOE).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL02 (EL1918) - Module 1 (FSOE).sds new file mode 100644 index 0000000..4ca064c --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL02 (EL1918) - Module 1 (FSOE).sds @@ -0,0 +1,442 @@ + + + + 4 + 17827710 + 2 + + 168 + + 50921514 + Automatic + 168 + master + FSoE + false + false + false + false + false + 14 + 100 + + + 02000000 + 0000 + 0000 + 0B + 08018070 + 01010270 + 01011270 + 01012270 + 01013270 + 01014270 + 01015270 + 01016270 + 01017270 + 10038070 + 10028070 + 13 + 08018060 + 01010160 + 01010260 + 01011160 + 01011260 + 01012160 + 01012260 + 01013160 + 01013260 + 01014160 + 01014260 + 01015160 + 01015260 + 01016160 + 01016260 + 01017160 + 01017260 + 10038060 + 10028060 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 7E071001 + + + FSoE Command + 28800 + 1 + USINT + Out + ProtocolData + 8 + 0 + -1 + + + FSIN Module 1.ErrAck + 28674 + 1 + BIT + Out + SafetySil3 + 1 + 8 + 0 + + + FSIN Module 2.ErrAck + 28690 + 1 + BIT + Out + SafetySil3 + 1 + 9 + 1 + + + FSIN Module 3.ErrAck + 28706 + 1 + BIT + Out + SafetySil3 + 1 + 10 + 2 + + + FSIN Module 4.ErrAck + 28722 + 1 + BIT + Out + SafetySil3 + 1 + 11 + 3 + + + FSIN Module 5.ErrAck + 28738 + 1 + BIT + Out + SafetySil3 + 1 + 12 + 4 + + + FSIN Module 6.ErrAck + 28754 + 1 + BIT + Out + SafetySil3 + 1 + 13 + 5 + + + FSIN Module 7.ErrAck + 28770 + 1 + BIT + Out + SafetySil3 + 1 + 14 + 6 + + + FSIN Module 8.ErrAck + 28786 + 1 + BIT + Out + SafetySil3 + 1 + 15 + 7 + + + FSoE CRC 000 + 28800 + 3 + UINT + Out + ProtocolData + 16 + 16 + -1 + + + FSoE Connection ID + 28800 + 2 + UINT + Out + ProtocolData + 16 + 32 + -1 + + + FSoE Command + 24704 + 1 + USINT + In + ProtocolData + 8 + 0 + -1 + + + FSIN Module 1.Input + 24577 + 1 + BIT + In + SafetySil3 + 1 + 8 + 0 + + + FSIN Module 1.Module Fault + 24578 + 1 + BIT + In + SafetySil3 + 1 + 9 + 1 + + + FSIN Module 2.Input + 24593 + 1 + BIT + In + SafetySil3 + 1 + 10 + 2 + + + FSIN Module 2.Module Fault + 24594 + 1 + BIT + In + SafetySil3 + 1 + 11 + 3 + + + FSIN Module 3.Input + 24609 + 1 + BIT + In + SafetySil3 + 1 + 12 + 4 + + + FSIN Module 3.Module Fault + 24610 + 1 + BIT + In + SafetySil3 + 1 + 13 + 5 + + + FSIN Module 4.Input + 24625 + 1 + BIT + In + SafetySil3 + 1 + 14 + 6 + + + FSIN Module 4.Module Fault + 24626 + 1 + BIT + In + SafetySil3 + 1 + 15 + 7 + + + FSIN Module 5.Input + 24641 + 1 + BIT + In + SafetySil3 + 1 + 16 + 8 + + + FSIN Module 5.Module Fault + 24642 + 1 + BIT + In + SafetySil3 + 1 + 17 + 9 + + + FSIN Module 6.Input + 24657 + 1 + BIT + In + SafetySil3 + 1 + 18 + 10 + + + FSIN Module 6.Module Fault + 24658 + 1 + BIT + In + SafetySil3 + 1 + 19 + 11 + + + FSIN Module 7.Input + 24673 + 1 + BIT + In + SafetySil3 + 1 + 20 + 12 + + + FSIN Module 7.Module Fault + 24674 + 1 + BIT + In + SafetySil3 + 1 + 21 + 13 + + + FSIN Module 8.Input + 24689 + 1 + BIT + In + SafetySil3 + 1 + 22 + 14 + + + FSIN Module 8.Module Fault + 24690 + 1 + BIT + In + SafetySil3 + 1 + 23 + 15 + + + FSoE CRC 000 + 24704 + 3 + UINT + In + ProtocolData + 16 + 24 + -1 + + + FSoE Connection ID + 24704 + 2 + UINT + In + ProtocolData + 16 + 40 + -1 + + + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL03 (EL1918) - Module 1 (FSOE).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL03 (EL1918) - Module 1 (FSOE).sds new file mode 100644 index 0000000..121e817 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL03 (EL1918) - Module 1 (FSOE).sds @@ -0,0 +1,442 @@ + + + + 4 + 17827710 + 2 + + 191 + + 50921516 + Automatic + 191 + master + FSoE + false + false + false + false + false + 15 + 100 + + + 02000000 + 0000 + 0000 + 0B + 08018070 + 01010270 + 01011270 + 01012270 + 01013270 + 01014270 + 01015270 + 01016270 + 01017270 + 10038070 + 10028070 + 13 + 08018060 + 01010160 + 01010260 + 01011160 + 01011260 + 01012160 + 01012260 + 01013160 + 01013260 + 01014160 + 01014260 + 01015160 + 01015260 + 01016160 + 01016260 + 01017160 + 01017260 + 10038060 + 10028060 + 00 + 01 + 00 + 01 + 0A00 + 0200 + 00 + 01 + 00 + 01 + 0A00 + 0200 + 00 + 01 + 00 + 01 + 0A00 + 0200 + 00 + 01 + 00 + 01 + 0A00 + 0200 + 00 + 01 + 00 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 7E071001 + + + FSoE Command + 28800 + 1 + USINT + Out + ProtocolData + 8 + 0 + -1 + + + FSIN Module 1.ErrAck + 28674 + 1 + BIT + Out + SafetySil3 + 1 + 8 + 0 + + + FSIN Module 2.ErrAck + 28690 + 1 + BIT + Out + SafetySil3 + 1 + 9 + 1 + + + FSIN Module 3.ErrAck + 28706 + 1 + BIT + Out + SafetySil3 + 1 + 10 + 2 + + + FSIN Module 4.ErrAck + 28722 + 1 + BIT + Out + SafetySil3 + 1 + 11 + 3 + + + FSIN Module 5.ErrAck + 28738 + 1 + BIT + Out + SafetySil3 + 1 + 12 + 4 + + + FSIN Module 6.ErrAck + 28754 + 1 + BIT + Out + SafetySil3 + 1 + 13 + 5 + + + FSIN Module 7.ErrAck + 28770 + 1 + BIT + Out + SafetySil3 + 1 + 14 + 6 + + + FSIN Module 8.ErrAck + 28786 + 1 + BIT + Out + SafetySil3 + 1 + 15 + 7 + + + FSoE CRC 000 + 28800 + 3 + UINT + Out + ProtocolData + 16 + 16 + -1 + + + FSoE Connection ID + 28800 + 2 + UINT + Out + ProtocolData + 16 + 32 + -1 + + + FSoE Command + 24704 + 1 + USINT + In + ProtocolData + 8 + 0 + -1 + + + FSIN Module 1.Input + 24577 + 1 + BIT + In + SafetySil3 + 1 + 8 + 0 + + + FSIN Module 1.Module Fault + 24578 + 1 + BIT + In + SafetySil3 + 1 + 9 + 1 + + + FSIN Module 2.Input + 24593 + 1 + BIT + In + SafetySil3 + 1 + 10 + 2 + + + FSIN Module 2.Module Fault + 24594 + 1 + BIT + In + SafetySil3 + 1 + 11 + 3 + + + FSIN Module 3.Input + 24609 + 1 + BIT + In + SafetySil3 + 1 + 12 + 4 + + + FSIN Module 3.Module Fault + 24610 + 1 + BIT + In + SafetySil3 + 1 + 13 + 5 + + + FSIN Module 4.Input + 24625 + 1 + BIT + In + SafetySil3 + 1 + 14 + 6 + + + FSIN Module 4.Module Fault + 24626 + 1 + BIT + In + SafetySil3 + 1 + 15 + 7 + + + FSIN Module 5.Input + 24641 + 1 + BIT + In + SafetySil3 + 1 + 16 + 8 + + + FSIN Module 5.Module Fault + 24642 + 1 + BIT + In + SafetySil3 + 1 + 17 + 9 + + + FSIN Module 6.Input + 24657 + 1 + BIT + In + SafetySil3 + 1 + 18 + 10 + + + FSIN Module 6.Module Fault + 24658 + 1 + BIT + In + SafetySil3 + 1 + 19 + 11 + + + FSIN Module 7.Input + 24673 + 1 + BIT + In + SafetySil3 + 1 + 20 + 12 + + + FSIN Module 7.Module Fault + 24674 + 1 + BIT + In + SafetySil3 + 1 + 21 + 13 + + + FSIN Module 8.Input + 24689 + 1 + BIT + In + SafetySil3 + 1 + 22 + 14 + + + FSIN Module 8.Module Fault + 24690 + 1 + BIT + In + SafetySil3 + 1 + 23 + 15 + + + FSoE CRC 000 + 24704 + 3 + UINT + In + ProtocolData + 16 + 24 + -1 + + + FSoE Connection ID + 24704 + 2 + UINT + In + ProtocolData + 16 + 40 + -1 + + + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL04 (EL2904) - Module 1 (FSOES).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL04 (EL2904) - Module 1 (FSOES).sds new file mode 100644 index 0000000..36f2214 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL04 (EL2904) - Module 1 (FSOES).sds @@ -0,0 +1,166 @@ + + + + 4 + 290 + 2 + + 172 + + 50921518 + Automatic + 172 + master + FSoE + false + false + false + false + false + 24 + 100 + + + 0000 + 0000 + 00 + 00 + 00 + 00 + + + FSoE Master CMD + 28672 + 1 + USINT + Out + ProtocolData + 8 + 0 + -1 + + + OutputChannel1 + 28673 + 1 + BIT + Out + SafetySil3 + 1 + 8 + 0 + + + OutputChannel2 + 28673 + 2 + BIT + Out + SafetySil3 + 1 + 9 + 1 + + + OutputChannel3 + 28673 + 3 + BIT + Out + SafetySil3 + 1 + 10 + 2 + + + OutputChannel4 + 28673 + 4 + BIT + Out + SafetySil3 + 1 + 11 + 3 + + + + 0 + 0 + + Out + SafetySil3 + 4 + 12 + 4 + + + FSoE Master CRC_0 + 28672 + 3 + UINT + Out + ProtocolData + 16 + 16 + -1 + + + FSoE Master ConnID + 28672 + 2 + UINT + Out + ProtocolData + 16 + 32 + -1 + + + FSoE Slave CMD + 24576 + 1 + USINT + In + ProtocolData + 8 + 0 + -1 + + + + 0 + 0 + + In + SafetySil3 + 8 + 8 + 0 + + + FSoE Slave CRC_0 + 24576 + 3 + UINT + In + ProtocolData + 16 + 16 + -1 + + + FSoE Slave ConnID + 24576 + 2 + UINT + In + ProtocolData + 16 + 32 + -1 + + + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL05 (EL2904) - Module 1 (FSOES).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL05 (EL2904) - Module 1 (FSOES).sds new file mode 100644 index 0000000..1bb8ebe --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 1/K20_KL05 (EL2904) - Module 1 (FSOES).sds @@ -0,0 +1,166 @@ + + + + 4 + 290 + 2 + + 195 + + 50921520 + Automatic + 195 + master + FSoE + false + false + false + false + false + 25 + 100 + + + 0000 + 0000 + 00 + 00 + 00 + 00 + + + FSoE Master CMD + 28672 + 1 + USINT + Out + ProtocolData + 8 + 0 + -1 + + + OutputChannel1 + 28673 + 1 + BIT + Out + SafetySil3 + 1 + 8 + 0 + + + OutputChannel2 + 28673 + 2 + BIT + Out + SafetySil3 + 1 + 9 + 1 + + + OutputChannel3 + 28673 + 3 + BIT + Out + SafetySil3 + 1 + 10 + 2 + + + OutputChannel4 + 28673 + 4 + BIT + Out + SafetySil3 + 1 + 11 + 3 + + + + 0 + 0 + + Out + SafetySil3 + 4 + 12 + 4 + + + FSoE Master CRC_0 + 28672 + 3 + UINT + Out + ProtocolData + 16 + 16 + -1 + + + FSoE Master ConnID + 28672 + 2 + UINT + Out + ProtocolData + 16 + 32 + -1 + + + FSoE Slave CMD + 24576 + 1 + USINT + In + ProtocolData + 8 + 0 + -1 + + + + 0 + 0 + + In + SafetySil3 + 8 + 8 + 0 + + + FSoE Slave CRC_0 + 24576 + 3 + UINT + In + ProtocolData + 16 + 16 + -1 + + + FSoE Slave ConnID + 24576 + 2 + UINT + In + ProtocolData + 16 + 32 + -1 + + + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/Etcher2DoorLock.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/Etcher2DoorLock.sds new file mode 100644 index 0000000..09b62a8 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/Etcher2DoorLock.sds @@ -0,0 +1,18 @@ + + + + 1 + 1 + 0 + + 202 + + Manual + + In + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/Etcher2RobotDoorLock.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/Etcher2RobotDoorLock.sds new file mode 100644 index 0000000..1cd667e --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/Etcher2RobotDoorLock.sds @@ -0,0 +1,18 @@ + + + + 1 + 1 + 0 + + 204 + + Manual + + In + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/K21_KL02 (EL1918) - Module 1 (FSOE).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/K21_KL02 (EL1918) - Module 1 (FSOE).sds new file mode 100644 index 0000000..89f44db --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/K21_KL02 (EL1918) - Module 1 (FSOE).sds @@ -0,0 +1,442 @@ + + + + 4 + 17827710 + 2 + + 169 + + 50921504 + Automatic + 169 + master + FSoE + false + false + false + false + false + 16 + 100 + + + 02000000 + 0000 + 0000 + 0B + 08018070 + 01010270 + 01011270 + 01012270 + 01013270 + 01014270 + 01015270 + 01016270 + 01017270 + 10038070 + 10028070 + 13 + 08018060 + 01010160 + 01010260 + 01011160 + 01011260 + 01012160 + 01012260 + 01013160 + 01013260 + 01014160 + 01014260 + 01015160 + 01015260 + 01016160 + 01016260 + 01017160 + 01017260 + 10038060 + 10028060 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 7E071001 + + + FSoE Command + 28800 + 1 + USINT + Out + ProtocolData + 8 + 0 + -1 + + + FSIN Module 1.ErrAck + 28674 + 1 + BIT + Out + SafetySil3 + 1 + 8 + 0 + + + FSIN Module 2.ErrAck + 28690 + 1 + BIT + Out + SafetySil3 + 1 + 9 + 1 + + + FSIN Module 3.ErrAck + 28706 + 1 + BIT + Out + SafetySil3 + 1 + 10 + 2 + + + FSIN Module 4.ErrAck + 28722 + 1 + BIT + Out + SafetySil3 + 1 + 11 + 3 + + + FSIN Module 5.ErrAck + 28738 + 1 + BIT + Out + SafetySil3 + 1 + 12 + 4 + + + FSIN Module 6.ErrAck + 28754 + 1 + BIT + Out + SafetySil3 + 1 + 13 + 5 + + + FSIN Module 7.ErrAck + 28770 + 1 + BIT + Out + SafetySil3 + 1 + 14 + 6 + + + FSIN Module 8.ErrAck + 28786 + 1 + BIT + Out + SafetySil3 + 1 + 15 + 7 + + + FSoE CRC 000 + 28800 + 3 + UINT + Out + ProtocolData + 16 + 16 + -1 + + + FSoE Connection ID + 28800 + 2 + UINT + Out + ProtocolData + 16 + 32 + -1 + + + FSoE Command + 24704 + 1 + USINT + In + ProtocolData + 8 + 0 + -1 + + + FSIN Module 1.Input + 24577 + 1 + BIT + In + SafetySil3 + 1 + 8 + 0 + + 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SafetySil3 + 1 + 21 + 13 + + + FSIN Module 8.Input + 24689 + 1 + BIT + In + SafetySil3 + 1 + 22 + 14 + + + FSIN Module 8.Module Fault + 24690 + 1 + BIT + In + SafetySil3 + 1 + 23 + 15 + + + FSoE CRC 000 + 24704 + 3 + UINT + In + ProtocolData + 16 + 24 + -1 + + + FSoE Connection ID + 24704 + 2 + UINT + In + ProtocolData + 16 + 40 + -1 + + + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/K21_KL03 (EL1918) - Module 1 (FSOE).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/K21_KL03 (EL1918) - Module 1 (FSOE).sds new file mode 100644 index 0000000..d439133 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/K21_KL03 (EL1918) - Module 1 (FSOE).sds @@ -0,0 +1,442 @@ + + + + 4 + 17827710 + 2 + + 190 + + 50921506 + Automatic + 190 + master + FSoE + false + false + false + false + false + 17 + 100 + + + 02000000 + 0000 + 0000 + 0B + 08018070 + 01010270 + 01011270 + 01012270 + 01013270 + 01014270 + 01015270 + 01016270 + 01017270 + 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b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/K21_KL04 (EL2904) - Module 1 (FSOES).sds new file mode 100644 index 0000000..cb1f656 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Etcher 2/K21_KL04 (EL2904) - Module 1 (FSOES).sds @@ -0,0 +1,166 @@ + + + + 4 + 290 + 2 + + 183 + + 50921508 + Automatic + 183 + master + FSoE + false + false + false + false + false + 26 + 100 + + + 0000 + 0000 + 00 + 00 + 00 + 00 + + + FSoE Master CMD + 28672 + 1 + USINT + Out + ProtocolData + 8 + 0 + -1 + + + OutputChannel1 + 28673 + 1 + BIT + Out + SafetySil3 + 1 + 8 + 0 + + + OutputChannel2 + 28673 + 2 + BIT + Out + SafetySil3 + 1 + 9 + 1 + + + OutputChannel3 + 28673 + 3 + BIT + Out + SafetySil3 + 1 + 10 + 2 + + + OutputChannel4 + 28673 + 4 + BIT + Out + SafetySil3 + 1 + 11 + 3 + + + + 0 + 0 + + Out + SafetySil3 + 4 + 12 + 4 + + + FSoE Master CRC_0 + 28672 + 3 + UINT + Out + ProtocolData + 16 + 16 + -1 + + + FSoE Master ConnID + 28672 + 2 + UINT + Out + ProtocolData + 16 + 32 + -1 + + + FSoE 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+ BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/HV/HV_K01_KL02 (EL1918) - Module 1 (FSOE).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/HV/HV_K01_KL02 (EL1918) - Module 1 (FSOE).sds new file mode 100644 index 0000000..4e27903 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/HV/HV_K01_KL02 (EL1918) - Module 1 (FSOE).sds @@ -0,0 +1,442 @@ + + + + 4 + 17827710 + 2 + + 200 + + 50921496 + Automatic + 200 + master + FSoE + false + false + false + false + false + 13 + 100 + + + 02000000 + 0000 + 0000 + 0B + 08018070 + 01010270 + 01011270 + 01012270 + 01013270 + 01014270 + 01015270 + 01016270 + 01017270 + 10038070 + 10028070 + 13 + 08018060 + 01010160 + 01010260 + 01011160 + 01011260 + 01012160 + 01012260 + 01013160 + 01013260 + 01014160 + 01014260 + 01015160 + 01015260 + 01016160 + 01016260 + 01017160 + 01017260 + 10038060 + 10028060 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 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Devices/K01_KL05 (EL1918) - Module 1 (FSOE).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/K01_KL05 (EL1918) - Module 1 (FSOE).sds new file mode 100644 index 0000000..a25fb49 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/K01_KL05 (EL1918) - Module 1 (FSOE).sds @@ -0,0 +1,442 @@ + + + + 4 + 17827710 + 2 + + 154 + + 50921477 + Automatic + 154 + master + FSoE + false + false + false + false + false + 10 + 100 + + + 02000000 + 0000 + 0000 + 0B + 08018070 + 01010270 + 01011270 + 01012270 + 01013270 + 01014270 + 01015270 + 01016270 + 01017270 + 10038070 + 10028070 + 13 + 08018060 + 01010160 + 01010260 + 01011160 + 01011260 + 01012160 + 01012260 + 01013160 + 01013260 + 01014160 + 01014260 + 01015160 + 01015260 + 01016160 + 01016260 + 01017160 + 01017260 + 10038060 + 10028060 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 00 + 01 + 0A00 + 0200 + 00 + 01 + 00 + 01 + 0A00 + 0200 + 00 + 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Module 1 (FSOES).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/K01_KL07 (EL2904) - Module 1 (FSOES).sds new file mode 100644 index 0000000..931d746 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/K01_KL07 (EL2904) - Module 1 (FSOES).sds @@ -0,0 +1,166 @@ + + + + 4 + 290 + 2 + + 155 + + 50921481 + Automatic + 155 + master + FSoE + false + false + true + false + false + 20 + 100 + + + 0000 + 0000 + 00 + 00 + 00 + 00 + + + FSoE Master CMD + 28672 + 1 + USINT + Out + ProtocolData + 8 + 0 + -1 + + + OutputChannel1 + 28673 + 1 + BIT + Out + SafetySil3 + 1 + 8 + 0 + + + OutputChannel2 + 28673 + 2 + BIT + Out + SafetySil3 + 1 + 9 + 1 + + + OutputChannel3 + 28673 + 3 + BIT + Out + SafetySil3 + 1 + 10 + 2 + + + OutputChannel4 + 28673 + 4 + BIT + Out + SafetySil3 + 1 + 11 + 3 + + + + 0 + 0 + + Out + SafetySil3 + 4 + 12 + 4 + + + FSoE Master CRC_0 + 28672 + 3 + UINT + Out + ProtocolData + 16 + 16 + -1 + + + FSoE Master ConnID + 28672 + 2 + UINT + Out + ProtocolData + 16 + 32 + -1 + + + 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3 + UINT + In + ProtocolData + 16 + 24 + -1 + + + FSoE Connection ID + 24704 + 2 + UINT + In + ProtocolData + 16 + 40 + -1 + + + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/K12_KL03 (EL2904) - Module 1 (FSOES).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/K12_KL03 (EL2904) - Module 1 (FSOES).sds new file mode 100644 index 0000000..da455ee --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/K12_KL03 (EL2904) - Module 1 (FSOES).sds @@ -0,0 +1,166 @@ + + + + 4 + 290 + 2 + + 187 + + 50921540 + Automatic + 187 + master + FSoE + false + false + false + false + false + 28 + 100 + + + 0000 + 0000 + 00 + 01 + 01 + 00 + + + FSoE Master CMD + 28672 + 1 + USINT + Out + ProtocolData + 8 + 0 + -1 + + + OutputChannel1 + 28673 + 1 + BIT + Out + SafetySil3 + 1 + 8 + 0 + + + OutputChannel2 + 28673 + 2 + BIT + Out + SafetySil3 + 1 + 9 + 1 + + + OutputChannel3 + 28673 + 3 + BIT + Out + SafetySil3 + 1 + 10 + 2 + + + OutputChannel4 + 28673 + 4 + BIT + Out + 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Devices/Media/Door1Lock.sds new file mode 100644 index 0000000..d5185d0 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Media/Door1Lock.sds @@ -0,0 +1,18 @@ + + + + 1 + 1 + 0 + + 207 + + Manual + + In + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Media/Door2Lock.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Media/Door2Lock.sds new file mode 100644 index 0000000..896057a --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Media/Door2Lock.sds @@ -0,0 +1,18 @@ + + + + 1 + 1 + 0 + + 208 + + Manual + + In + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Media/Door3Lock.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Media/Door3Lock.sds new file mode 100644 index 0000000..bf7617e --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Media/Door3Lock.sds @@ -0,0 +1,18 @@ + + + + 1 + 1 + 0 + + 209 + + Manual + + In + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Media/M1_KL02 (EL1918) - Module 1 (FSOE).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Media/M1_KL02 (EL1918) - Module 1 (FSOE).sds new file mode 100644 index 0000000..f03ec06 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Media/M1_KL02 (EL1918) - Module 1 (FSOE).sds @@ -0,0 +1,442 @@ + + + + 4 + 17827710 + 2 + + 189 + + 50921522 + Automatic + 189 + master + FSoE + false + false + false + false + false + 110 + 100 + + + 02000000 + 0000 + 0000 + 0B + 08018070 + 01010270 + 01011270 + 01012270 + 01013270 + 01014270 + 01015270 + 01016270 + 01017270 + 10038070 + 10028070 + 13 + 08018060 + 01010160 + 01010260 + 01011160 + 01011260 + 01012160 + 01012260 + 01013160 + 01013260 + 01014160 + 01014260 + 01015160 + 01015260 + 01016160 + 01016260 + 01017160 + 01017260 + 10038060 + 10028060 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 0200 + 00 + 01 + 01 + 01 + 0A00 + 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diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/NIO_DOOR_LOCK.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/NIO_DOOR_LOCK.sds new file mode 100644 index 0000000..71597fd --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/NIO_DOOR_LOCK.sds @@ -0,0 +1,18 @@ + + + + 1 + 1 + 0 + + 199 + + Manual + + In + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/Other_Err.sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/Other_Err.sds new file mode 100644 index 0000000..3aa7df5 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/Other_Err.sds @@ -0,0 +1,18 @@ + + + + 1 + 2 + 0 + + 10 + + Manual + + Out + 0 + BIT + 1 + + + \ No newline at end of file diff --git a/TwinSAFE/TwinSafeGroup1/Alias Devices/PC_K01_KL01 (EL1918).sds b/TwinSAFE/TwinSafeGroup1/Alias Devices/PC_K01_KL01 (EL1918).sds new file mode 100644 index 0000000..c658944 --- /dev/null +++ b/TwinSAFE/TwinSafeGroup1/Alias Devices/PC_K01_KL01 (EL1918).sds @@ -0,0 +1,459 @@ + + + + 4 + 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