Commit Graph

38 Commits

Author SHA1 Message Date
Matthias Heisig
bbf60864db Added inverter active signal to avoid triggering the isolation monitoring 2025-04-15 13:22:55 +02:00
Matthias Heisig
483fa83149 Switch voltage low and high sequence in modbus error and warning register for consistency 2025-04-15 13:21:56 +02:00
Matthias Heisig
a50ffaa00d Merge branch 'feature/modbusErrorMSG' into develop 2025-04-14 19:46:43 +02:00
Matthias Heisig
390b831286 Hardware reset button now triggers an alarm acknowledge signal 2025-04-14 19:46:02 +02:00
Matthias Heisig
f79cf27c0c Finished first implementation of modbus error registers 2025-04-14 19:38:17 +02:00
Matthias Heisig
4a00a4c414 Added Modbus registers 2025-04-08 07:24:55 +02:00
Matthias Heisig
e975d23694 Merge branch 'develop' of gitlab.cmblu.net:sps-allgemein/uniblu into develop 2025-04-06 10:23:25 +02:00
Matthias Heisig
2221f6bab3 Minor bugfixes and future addons 2025-04-06 10:21:01 +02:00
Philipp Schinacher
6a1ee45179 add liste alarme 2025-03-31 14:46:52 +02:00
Matthias Heisig
84e0e174a1 Fixed missing multistring handling in some modes 2025-02-14 16:14:07 +01:00
Matthias Heisig
4f0905d64a Fixed some bugs in cycling mode 2025-02-14 15:42:27 +01:00
Matthias Heisig
2ded890dd4 Added multi string handling and balancing 2025-02-13 21:26:50 +01:00
Matthias Heisig
f9df0a5180 Added precharging to SafetyCheck 2025-02-10 08:44:52 +01:00
Matthias Heisig
0345f57a3f Some refactoring 2025-01-17 08:08:37 +01:00
Matthias Heisig
39a02352f6 Iso and leackage error messages added 2024-09-10 16:54:17 +02:00
Matthias Heisig
d9f39953a0 Added shutdown when inverter error 2024-09-06 18:47:03 +02:00
Matthias Heisig
3d041c50c4 - Added new module status
- Added error messages for EtherCAT connection lost
2024-09-05 18:32:49 +02:00
Matthias Heisig
5e94ba4868 Merge branch 'feature/ManualModeSwitch' into develop
# Conflicts:
#	PLC/PLC.tmc
#	PLC/POUs/FB_String.TcPOU
#	PLC/POUs/MAIN.TcPOU
#	Uniper.tsproj
2024-08-30 14:32:11 +02:00
Matthias Heisig
08d2ffd136 Added string startup timeout 2024-08-30 13:12:42 +02:00
Matthias Heisig
112f7cb7d9 Added automatic manual mode change for all components if manual mode is selected, Added moving average filter to analog data 2024-08-26 22:19:29 +02:00
Matthias Heisig
58e511438e Umstellung auf TwinCAT 4026 2024-07-29 07:33:50 +02:00
Matthias Heisig
0d9a4d9c72 WIP: Aktueller stand für fehlersuche Sensorrauschen 2024-05-22 17:43:26 +02:00
Matthias Heisig
cf0d144987 Reordered Modbus registers for Energielenker 2024-05-07 18:02:07 +02:00
Matthias Heisig
5c42d4db0a Added ac phase currents to inverter data and copy it to modbus interface 2024-05-07 17:34:01 +02:00
Matthias Heisig
0ffff9be2a EMS communication and Voltage optimizations
- Added data for EMS communication
- Added highest segment voltage for charging check
- Added lowest segment voltage for discharging check
2024-05-07 17:10:29 +02:00
Matthias Heisig
327f324be8 Implemented fixes and improvements during comissioning
- New Balancing mode
- HMI Interface for Inverterdata implemented
- Adjusted GVL_CONFIG values
- Read inverter data even when inverter is off
- Added OPC UA settings to inverter data hmi interface
- Added multisettings to safety project for strings
2024-05-06 11:05:33 +02:00
Matthias Heisig
b95033a155 First string implemented 2024-04-18 08:32:21 +02:00
Matthias Heisig
9ce3522a70 WIP: Inbetriebnahme vorladen 2024-04-11 19:06:45 +02:00
Matthias Heisig
ef26159a4f Added safety program pre comissioning and started implementing different modes 2024-03-20 18:08:57 +01:00
Matthias Heisig
57987cb19f Fixed Modbus register access 2024-01-17 11:26:11 +01:00
Matthias Heisig
82826c258a Removed for development unnecessary temporary files from repository and updated .gitignore 2024-01-15 17:48:07 +01:00
Matthias Heisig
70647caee4 Added Modbus-server register mapping file 2024-01-15 17:36:37 +01:00
Matthias Heisig
4586e72a0e Added inverter implementation 2024-01-05 16:27:39 +01:00
Matthias Heisig
bd0bbd9c8b Added Simulation plc and removed unnecessary files from repository 2024-01-04 18:39:55 +01:00
Matthias Heisig
2bd41279b1 removed ~u file 2024-01-04 15:19:27 +01:00
Matthias Heisig
c2e3c2a5d7 .gitignore geändert 2024-01-04 15:18:26 +01:00
Matthias Heisig
faa33db290 Projektdateien hinzufügen. 2024-01-04 15:15:26 +01:00
Matthias Heisig
4c6f8dc5bd GITIGNORE und GITATTRIBUTES hinzufügen. 2024-01-04 15:15:23 +01:00